Abstract

Recent progress and issues of characterization and control of surfaces and interfaces as related to III–V nanoelectronics are reviewed. After a brief general review of III–V nanotechnology, a novel hexagonal binary decision diagram (BDD) quantum logic circuit approach is introduced where hexagonal nanowire networks are controlled by nanoscale Schottky gates. For controlled formation of high-density nanostruc-tures, selective molecular beam epitaxy growth is described together with a brief description of a cathodoluminescence-based characterization of buried heterointerfaces. As the key processing issue, problems associated with nanostructure surfaces and Schottky gates are discussed, introducing a recent scanned probe study and attempts to remove Fermi level pinning by a silicon interface control layer.

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