Abstract

In this brief, we computationally examine electrical characteristics of stacked gate-all-around Si nanosheet MOSFETs (GAA NS-FETs) with and without metal sidewall (MSW) source/drain (S/D) by increasing the number of channels (NCs) and their impacts on digital circuits. The ON-current ( I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) and circuit performances of the NS-FETs without the MSW S/D are limited to three channels due to the electrostatic potential decreasing from the top contacts to the bottom S/D side of NS-FETs; however, the MSW S/D can improve the I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> with increasing the NCs over three channels because of low resistivity of tungsten ( 5.6×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> Ω·cm) in the sidewall of S/D and then the circuit performances can be boost by the MSW S/D structure of the stacked GAA NS-FETs over three channels. For example, up to six channels of the NS-FETs with the MSW S/D, the frequency of ring oscillator is 57% increase, compared with the case without MSW S/D. The results of this study can be considered to design the S/D structure of the stacked GAA NS-FETs in emerging device technologies.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.