Abstract

Thin layers of μc-GaP and a-GaP grown on n- type silicon wafers by plasma-enhanced atomic layer deposition at 380 °C are characterized by space charge capacitance techniques, C-V profiling and deep level transient spectroscopy (DLTS). Two defect levels with activation energies of 0.30 eV and 0.80 eV were detected by DLTS in the μc-GaP/n-Si structure. Measurements performed on Schottky barriers formed on n-Si after selective etching of the GaP layer did not reveal any defect level meaning that the observed defects in the μc-GaP/n-Si structure are related to μc-GaP layer.

Highlights

  • Nowadays, growth of III-V compounds on silicon wafers is a challenge for many scientists in the world

  • For the μc-GaP/n-Si structure a clear peak of concentration is observed at low bias voltage, which corresponds to the lowest depth of SСR

  • Thin layers of μc-GaP and a-GaP were grown on n-type silicon wafers by the new low temperature PE– ALD technique

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Summary

Introduction

Growth of III-V compounds on silicon wafers is a challenge for many scientists in the world. The GaP/Si heterojunction is a perspective for bottom subcells in MJ SC, because GaP has only 0.4% of lattice- mismatch with silicon and it can be grown on Si by modern epitaxial methods Dilute nitrides such as (In)GaP(NAs) can be grown on GaP layers for fabricating top subcells in view of high efficiency MJ SC. It is known that molecular beam epitaxy (MBE) and vapor phase epitaxy (VPE) require high temperatures (800-900 °C) during process growth It leads to the deterioration of the Si wafer quality [4, 5] and of the GaP/Si interface due to different coefficients of thermal expansion and inter-diffusion of atoms at the III-V/Si interface. The main aim of the study is the characterization of the GaP/n- Si structure by the capacitancevoltage (C-V) method and deep-level spectroscopy (DLTS)

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