Abstract
A comprehensive modeling framework is presented to predict the time kinetics of negative bias temperature instability stress and recovery during and after dc and ac stresses and also during mixed dc–ac stress. The model uses uncorrelated contributions from the generation of interface and bulk traps and hole trapping in preexisting bulk traps. Ultrafast measured data at different stresses and recovery biases, temperature, duty cycle and frequency, as well as arbitrary time segments with dynamically varying voltage, frequency, and activity are predicted. The role of nitrogen in the gate insulator is explained. End-of-life degradation is determined under dc and ac use conditions.
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