Abstract

Many RNS-based implementations of digital signal processing algorithms have experienced the overkill of arithmetic operator sizes due to the choice of moduli set to accommodate for the occasional high precision operations. As the sizes of modulo arithmetic operators are fixed by the choice of their moduli, they are not scalable even if there is a subsequent reduction in the dynamic range. This paper introduces the notion of base transformation to complement residue scaling in reducing the overall arithmetic processing costs of multi-base RNS. A new algorithm is proposed to directly map the residues of signed integers from one modulo-arithmetic friendly base S1 ≡ {2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> -1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n+k</sup> , 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1} to another S2 ≡ {2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n-α</sup> -1, 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n+k-α</sup> , 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n-α</sup> +1}, to reduce the word lengths of residue arithmetic operators by α bits along with the reduction of dynamic range. It infers the quantized segment in S2 directly from the quantized segment of the input residues in S1 to avoid the complex reverse conversion and sign detection operations. Our synthesis results show that its VLSI implementation efficiency, in terms of area-delay product and energy consumption, outperforms the best possible improvised solution and the approach of removing one modulus channel. Noticeably, the improvements enhance with increasing α.

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