Abstract

A CMOS automatic gain control (AGC) circuit for power line networking application is presented. In this work, the AGC can effectively lock the amplitude of the input signal within 0.2mus. Implemented in 0.35mum CMOS process, the dynamic range of the variable gain amplifier is more than 36dB and the bandwidth of its forward path is 85MHz. It is designed for power line communication application and is fed from a single 3.3-V power supply. Its power consumption is 4.2mW and area of the AGC is 630 times 700 mum2

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.