Abstract
New methods of Petri net array-based architectural synthesis are presented. Methods are based on the parallel decomposition of control algorithm into concurrently working state machine subnets and structural decomposition of a digital system. Structural decomposition leads to realization of a logic circuit as a two-level structure, where the combinational circuit of the first level is responsible for firing of transitions, and the second level is a memory used for generation of micro-operations. The memory organization depends on selected architecture. State machine subnets are determined by colors. Places are encoded using minimal numbers of bits. Micro-operations assigned to places are written in memory. Such an approach allows modular organization of logic circuit where each block has strictly determined function and balanced usage of different kinds of resources available in modern FPGAs.
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