Abstract
The design of centralized parallel bus arbitration logic built around the MC68452 bus arbitration module (BAM) is described. It has been implemented on a homogeneous, tightly coupled multiprocessor architecture. Each processor board contains a 16-bit MC68000 microprocessor with local memory and peripherals. Asynchronous global bus requests are sent to the BAM which uses a fixed physical priority scheme in cases of bus access conflicts.
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