Abstract

The hole collector in silicon heterojunction cells serves not only as an integral component of the p/n junction, determining the strength of the built-in electric field, but also as a layer responsible for hole transport, thereby affecting carrier transport capacity. To enhance carrier extraction and transport properties of the hole collector, various interface treatments have been employed on p-type nanocrystalline (p-nc-Si:H) hole collectors. Through an examination of characteristics such as dark conductivity, crystallinity, and contact resistance, the impact of interface treatment on p-nc-Si:H hole collectors is clarified. Furthermore, considering distinct requirements for the hole collector at different locations, interface treatment processes are optimized accordingly. The introduction of interface treatment on p-nc-Si:H hole collectors has demonstrated significant enhancement of both front and rear junction cell efficiencies, which increased from 17.74% to 21.61% and from 16.83% to 20.92%, respectively.

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