Analytical model for high-k SOI pLDMOS with self-adaptive balance of polarization charge

Abstract

The analytical model of high-k SOI pLDMOS (HK SOI pLDMOS) with adaptive polarization charges is proposed in this paper. The HK SOI pLDMOS structure features a HK dielectric trench, which can introduce polarization charges to keep inner self-charge balance with the ions in the drift region and the carriers in the substrate. The HK trench assists the depletion in drift region to decreased the special on-resistance (RON,sp). In order to further modulate the electric field and reduce the RON,sp, a back gate is planted in the substrate. The analytical model of potential and the surface electric field distribution with in the HK trench is obtained by solving the Poisson equation. According to that a design formula is further deduced where the impact of high-k dielectric and back gate voltage are involved. The simulation results show that the proposed structure exhibits a breakdown voltage (VB) of −298 V and an RON,sp of 10.28 mΩ cm2, at a back gate bias of −100 V. Compared with the conventional (Con.) trench SOI pLDMOS, RON,sp is decreased by 23.17%, and the VB is improved by 15.94%.