Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs

Abstract

This paper reports on the integration of vertical nTunnel FETs (TFETs) with SiGe hetero-junction and analyzes the presence of trap-assisted tunneling impacting the device behavior. Temperature measurements are used to distinguish the band-to-band tunneling (BTBT) from the trap-assisted tunneling (TAT). It is shown that TAT degrades the onset characteristic and the subthreshold swing of the devices. TCAD simulations are in good agreement with experimental data for a germanium content up to 44%, when including non-local TAT model and properly tuning the model’s parameters. Simulations also suggest that boosting the BTBT component, for example by further bandgap decrease (Ge source), or by other means should be beneficial in lowering the impact of trap-assisted tunneling, provided that the material defectivity does not worsen.