Analysis of the Channel and Contact Regions in Staggered and Drain-Offset ZnO Thin-Film Transistors With Compact Modeling

Abstract

Zinc oxide thin-film transistors (TFTs) with different device geometries and source/drain (S/D) contact metallizations are investigated. To facilitate the analysis, the channel and contact regions in top-gated staggered and drain-offset TFTs employing various permutations of ruthenium (Ru) and gold (Au) bottom electrodes are quantified with a TFT device model. The staggered TFT structure employs identical geometric overlaps between the gate-and-S/D electrodes; whereas the drain-offset TFT structure replaces the gate-to-drain overlap with a geometric gap in the channel. First, the experimental TFT current–voltage ( ${I}$ – ${V}$ ) characteristics are disentangled into the intrinsic channel and contact components by the transmission line method. The contact and channel behaviors are then individually modeled using a universal transistor compact model. From evaluating the model parameters, the diverse device characteristics observed in this paper are attributed to the Au electrode’s electron doping effect altering the properties of both the TFT’s contact and channel regions.