Abstract
In this article, the sector update delay (SUD) of the digital control three-phase six-switch (3 ph–6 s) buck power factor correction (PFC) converter is analyzed. SUD of 3 ph–6 s buck PFC converter results in the increase of switching loss and input current distortion at the transition from even sector to odd sector. For applications when ac input frequency is 47–63 Hz, the effect of SUD is relatively small, and SUD is usually ignored. However, for applications of high ac input frequency, e.g., 360–800 Hz, the SUD of 3 ph–6 s buck PFC converter seriously affects its efficiency and input current total harmonics distortion (THD). In order to suppress the effect of SUD and to improve the input current THD and efficiency of 3 ph–6 s buck PFC converter over a wide ac input frequency, a time delay compensation method has been proposed in this article. The effect of SUD is verified by a 1.5-kW prototype with a low-cost microcontroller. Experimental results show that lower input current THD and higher efficiency over a wide ac input frequency have been achieved by the proposed compensation method.
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