Analysis of MTJ Based Ternary Content Addressable Memory With and Without Match-Line Pre-Charge

Abstract

The intent of this paper is to analyze the working of the Magnetic Tunnel Junction (MTJ) based Ternary Content Addressable Memory (TCAM) with and without the match-line (ML) pre-charge. The designs of the memory with MTJs that have been implemented by previous researchers have made use of ML pre-charge. In this paper, for performance comparison, three different TCAM cells have been implemented - one with ML pre-charge (PC) and the other two, namely Self-Controlled Pre-charge free (SCPF) and Hybrid SCPF (HSCPF), without ML pre-charge. The designs were simulated on Cadence Virtuoso design tool using CMOS 180 nm technology with a supply voltage of 3 V. Arrays of different sizes for all three circuits were simulated and compared with respect to delay, area and power. The study revealed that, for an 8X16 array, the delay for SCPF and HSCPF is 79.77% and 25013.5% more than that of PC circuit, area occupied is 98.65% and 38.04% more than that of PC Circuit. Power consumed for SCPF and HSCPF arrays is 125.38% and 7.5% more than that of PC Circuit. This is in contrast to the Static Random Access Memory (SRAM) based TCAM circuits where power and delay for SCPF and HSCPF circuits is lesser than that of PC circuit.