Abstract
This paper analyzes high linearity Cherry–Hopper programmable-gain-amplifier (PGA), which is a cascade of linear transconductance (Gm) stage and transimpedance (TIA) stage. Basing on these analysis, reasons for gain peaking of Gm–TIA PGA are discussed. A Gm–TIA PGA with flat gain response and high power-efficiency is designed, and implemented in a 0.18 μm CMOS process. It draws 260-μA current from a supply of 1.8-V, while maintains a constant bandwidth of 24-MHz when driving a capacitive load of 2-pF. Flat gain response over the gain range is obtained, and the measured OIP3 reaches 19.5 dBm.
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