Analysis and Design of CMOS Amplitude Modulator With Digitally Controlled Variable Attenuator

Abstract

A multimode RF amplitude modulator and a digitally controlled variable attenuator (VATT) are presented. A comprehensive analysis of nonlinear distortion in a current source modulated amplitude modulator is studied in this paper. To improve the dynamic range and reduce local oscillator leakage, dual power modes and a cascode transistor for amplitude modulation are employed in the amplitude modulator. The amplitude modulator consists of a switching transistor with a modulating current source, which allows low power consumption and linear amplitude modulation. The digitally controlled VATT is designed for power level control. Five II stages are cascaded to attain the attenuation levels over 32 dB. By using the proposed adaptive II type attenuator, we can get the optimized attenuation stages and port matching at all the attenuation states. The maximum output power of the modulator is 7.8 dBm, while consuming 18 mA of dc current. In the low power mode, the modulator consumes less than 1 mA of dc current. The current consumption is scaled down to 7 mA when the modulated WCDMA signal output power is 0.9 dBm and the EDGE signal output power is 1.2 dBm. The measured minimum insertion loss of the VATT is 2.5 dB and the maximum attenuation control range is 34.8 dB at 1.95 GHz. The control resolution is 1 dB. The worst caseS11 and S22 responses were measured to be -16 dB. There is no power consumption at the VATT. The chip is implemented with a 0.18-μm CMOS process. The total chip size is 1 × 0.9 mm2.