Abstract

A BiCMOS squarer using active attenuators which has been fabricated in a 10 /spl mu/m BiCMOS process is presented. Experimental results show that the nonlinearity of the squarer can be kept below 2%, across the entire input voltage range of /spl plusmn/0.3 V. Its -3 dB bandwidth is measured to be /spl sim/1 MHz. Moreover, based on the proposed squarer circuits, a four-quadrant multiplier and a vector summation circuit have also been realised. The proposed circuits are expected to be useful in analogue signal processing applications.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.