Abstract
A CMOS voltage reference, based on the difference between the gate-source voltages of two NMOS transistors, has been realized with AMS 0.35 mum CMOS technology (Vthn equiv 0.45 V and Vthn 0.75 V at 0 degC). The minimum and maximum supply voltages are 1.5 V and 4.3 V, respectively. The supply current at the maximum supply voltage and at 80 degC is 2.4 pA. A temperature coefficient of 25 ppm/degC and a line sensitivity of 1.6 mV/V are achieved. The power supply rejection ratios without any filtering capacitor at 100 Hz and 10 MHz are larger than -74 and -59 dB, respectively. The occupied chip area is 0.08 mm2
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