Abstract

SummaryLow‐power low noise amplifiers (LNAs) are critical block in the radio frequency (RF) front‐end of medical device radiocommunications service (MedRadio) receivers for amplifying weak received signals while introducing minimal noise. Despite the inherently low transconductance of MOS transistors, it is possible to achieve low noise, high gain, and good linearity in low power LNAs. This paper presents a combination of techniques to realize an ultra‐low‐power LNA with a compact size and high performance. The proposed LNA utilizes multiple gm‐boosting and self‐forward body bias techniques, with certain transistors operating in weak inversion. Additionally, the Multi‐Objective Inclined Planes System Optimization algorithm is employed to determine the optimal values of the circuit components, thereby achieving the best compromise among the various performance parameters. The proposed LNA with buffer is designed and simulated using an 180 nm CMOS process over the frequency band of 0.3–1 GHz. Simulated results show that the proposed LNA achieves a gain of 19.6 dB, a noise figure of 5.1 dB, good input matching (S11 < −10 dB), and a third‐order intermodulation intercept point (IIP3) of 3.8 dBm. Additionally, it consumes 320 μW (without buffer) from a 1 V power supply, and the chip area is 235 μm × 372 μm. The simulated results demonstrate that the proposed ultra‐low power LNA is a promising candidate for biomedical applications.

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