Abstract
The current-steering DAC is the most common architecture for medium resolution and ultrahigh data rates, extending well to tens of giga samples per seconds in nanometer MOS process technologies. It is commonly found in all types of communication systems, instrumentation, and consumer applications, among others, due to its capability of efficiently synthesizing the analog output on a low impedance load. This tutorial builds upon previous ones, pointing to a variety of techniques that extend the current-steering DAC’s dynamic performance to an ever-higher input data rate and analog output frequency.
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