An improved wide-range, low-complexity, fully-parallel digital background timing mismatch calibration method for dual-channel TIADC based on perfect reconstruction filter bank

Abstract

This paper presents a fully-digital background calibration method for calibrating timing mismatch in dual-channel time-interleaved analog-to-digital converter (TIADC). The proposed method estimates timing mismatch by performing correlation calculations on the outputs of sub-channels and corrects this mismatch using the improved perfect reconstruction filter bank (PRFB). The PRFB, which is improved by employing a polynomial fitting method, offers superior performance with fewer filter taps and extends the timing mismatch correction capability to almost the entire sampling clock cycle. The improved PRFB uses only one twentieth of the taps used in the original PRFB, and its dual-channel FIR filters have anti-symmetric taps. To enhance the real-time calibration capability of the system, this paper gives a fully-parallel hardware structure for calibrating offset, gain, bandwidth, and timing mismatches. The effectiveness of the proposed hardware structure is verified through a 10-bit 3GS/s dual-channel TIADC test platform. Simulation and measurement results show that the proposed calibration method significantly improves the signal-to-noise-and-distortion (SNDR) and spurious-free dynamic range (SFDR) of both single-tone and multi-tone input signals, which makes the proposed method a viable solution for practical TIADC applications.