Abstract
An improved decoding algorithm is presented in order to solve the problem of inconvenient for hardware implementation in decoding algorithm for non-binary LDPC codes based on the FFT-BP algorithm. The innovation of the new algorithm is the importing of the logarithmic operations, which will transform multiplication operations to addition operations in the logarithmic domains. Thus the presented algorithm has the advantages of the reduced complexity and the more convenient hardware implementation. A simulation is made using regular non binary LDPC codes under White Gaussian Noise channel based on GF(4). The result shows that the decoding complexity is much more reduced with the performance decrease by about 0.07 dB when BER( Bit Error Rate )is 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> .
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