Abstract
Processing an image in the RGB color space, with a set of RGB values for each pixel is not the most efficient method. To speed up some processing steps many video compression and communication techniques use luminance/chrominance color spaces, such as YCrCb, making a mechanism for converting between formats necessary. Therefore, techniques which efficiently implement this conversion are desired. This paper presents a novel architecture for efficient implementation of two such color space converters (CSC) suitable for field programmable gate array (FPGA) and VLSI. The proposed architecture is based on distributed arithmetic (DA) ROM accumulator principles. The architecture has been implemented and verified using the Celoxica RC1000-PP FPGA development board. The implementation approach exhibits better performance when compared with existing implementations.
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