An exquisitely sensitive variant-conscious post-silicon Hardware Trojan detection

Abstract

Hardware Trojans, malicious modifications or additions to circuit elements, are often introduced during outsourced stages of IC manufacturing. Their presence in hardware security platforms became a concern after incidents like the Syrian RADAR failure and the Kill-switch incident. Existing Trojan detection techniques mostly focus on netlist-level identification and overlook process variation challenges in post-silicon ICs. In this work, we introduce a novel golden free and highly sensitive detection method that addresses process variations and various sources of noise. Our approach achieves enhanced detection sensitivity by (i) utilizing an efficient circuit partitioning method that takes into account post-silicon noises, ensuring post-silicon validation through pre-silicon analysis, (ii) implementing a technique to mitigate the impact of systematic and random variations within and between dies, (iii) developing a variation-aware test pattern generation approach that utilizes a bit-flipping technique, leading to low transition net switching and increasing the likelihood of activating Trojans. We evaluate the sensitivity of our detection approach using a custom tool called relative power difference (RPD). To validate our method, we conduct experiments on the ISCAS’89 benchmark and the AES-128 circuit, testing against various Trojans reported in the literature. Our results demonstrate outstanding detection sensitivity for inserted Trojans across different levels of noise.