An efficient VLSI circuit partitioning algorithm based on satin bowerbird optimization (SBO)

Abstract

In partitioning, a circuit is recursively divided into several subcircuits so that each can be efficiently and independently designed with the main objective of reducing the cut-cost. Partitioning is a first step in the very large-scale integration (VLSI) physical design process, and all the other physical design steps such as floorplanning, placement, pin assignment, and routing depend on its outcome. The partitioning determines the overall quality of the final layout, since the use of an incorrect partitioning can degrade the performance of all subsequent phases of the physical design process. A novel partitioning algorithm based on the concept of satin bowerbird optimization (SBO) is proposed herein. The bioinspired SBO algorithm chooses the initial partitions randomly then utilizes the concepts of fitness value evaluation and group migration to improve the cut-cost. The performance of the proposed algorithm is evaluated using parameters such as the cut-cost and time complexity based on simulations with ISCAS’85 benchmark circuits. The performance parameters of the circuits, i.e., area, power, and delay, are evaluated before and after partitioning. The proposed bioinspired SBO algorithm is compared with similar bioinspired algorithms such as ant colony optimization, particle swam optimization, genetic, and firefly algorithms.