Abstract
A separable electromagnetic coupler was designed, simulated, fabricated, and tested as part of a prototype eight module multidrop memory bus running at 1.6 Gb/s per differential pair. The coupler consists of broadside coupled traces, one on a rigid motherboard and the other on a flex circuit soldered to a daughter card. The zigzag geometry of the traces reduces variation in coupling coefficient due to horizontal and vertical misalignment of the coupler halves. Simulation and testing indicates that a target capacitive coupling coefficient of 0.34, which has been selected to balance signal transmission level requirements against motherboard impedance discontinuity effects, can be achieved with little variation over +/- 12 mil alignment tolerance.
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