Abstract

Channel routing is a key problem in the physical design of VLSI chips. It is known that max(d max , v max ) is a lower bound on the number of tracks required in the reserved two-layer Manhattan routing model, where d max is the channel density and v max is the length of the longest path in the vertical constraint graph. In this paper we propose a deterministic polynomial time algorithm that computes a better and non-trivial lower bound on the number of tracks required for routing a channel without doglegging. This algorithm is also applicable for computing a lower bound on the number of tracks in the three-layer no-dogleg HVH routing as well as two- and three-layer restricted dogleg routing models.

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