All-pole phase-locked loops: calculating lock-in range by using Evan's root-locus

Abstract

The dynamics of a phase-locked loop (PLL), an essential component for the electronic synchronization processes, is described by an ordinary nonlinear differential equation with an order equal to 1 plus the order of its internal linear low-pass filter. Literature contains several results mainly concerned to the second-order loops giving expressions for lock-in range and transient response specifying a linear equivalent second-order system. However, in some applications, more accurate transient responses are necessary and the PLL performance can be improved by considering the higher-order filters resulting in the nonlinear loops with order greater than 2. Such systems, due to high order and nonlinear terms, depending on the parameters combination can present some undesirable behaviors, resulting from bifurcations, as error oscillation and chaos, decreasing the synchronization ranges. Implication to engineering design is that some regions of the parameter space become forbidden limiting the circuit options. This work is a contribution on establishing the lock-in range for a PLL of generic order n + 1, considering that the filter is all-pole linear stable low-pass of order n. Analysis is performed by detecting a Hopf bifurcation on the synchronous state by using the root-locus method combined with the dynamical system theory. The lock-in range is calculated by applying the classical control tools defining an equivalent feedback control system.