Advances in crystalline silicon heterojunction research and opportunities for low manufacturing costs

Abstract

The silicon heterojunction (SHJ) technology has proven its ability to produce very high efficiency devices. Competitive production costs at the mass production level can be potentially reached by integrating latest technological developments. For example, a large variety of advanced layers can be implemented to reduce the parasitic absorption losses at the front side of the device. Progress in cell metallization (fine-line screen-printing and electroplating) allows also significant improvement in efficiency: a full-area 6″ CZ cell with 22.8% efficiency (busbar-less, measured with GridTouch) and with a Voc of 736 mV has been realized using industry-compatible processes. With thin wafers of 70–80 microns, Voc up to 747 mV are achieved. Using simple and size-scalable patterning methods, 9 cm2 interdigitated back-contacted SHJ cells have been produced, with efficiencies up to 22%. On the module level, multi-wire cell interconnection schemes offer opportunities for lower manufacturing costs. In addition, we show that the temperature coefficient of SHJ cells strongly depends on the cell structure. The transport through most buffer layers is improved with increasing temperature, leading in some cases to values below −0.1%/°C, with a thermally activated fill factor. We show finally how SHJ devices can be produced in a highly cost-effective way, i.e. allowing one to reach mass manufacturing costs at or even below those of PERC solar cells, while still ensuring higher efficiency and improved energy yield.