Abstract

A wideband logarithmic amplifier is demonstrated in this paper using InP-InGaAs double heterojunction bipolar transistor technology. The amplifier uses cascaded gain stages including the limiting and unity amplifiers to achieve a piecewise approximation to the ideal logarithmic response. The performance of 43-dB dynamic range, 22-GHz bandwidth, and <plusmn2-dB log error is achieved. The integrated circuit consumes 650 mW and has a chip dimension of 1times0.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.