Abstract

In this paper, the mathematical foundations of the security implications of utilizing various on-chip voltage converters as a countermeasure against differential power analysis (DPA) attacks are investigated. An exhaustive mathematical analysis of a recently proposed converter-reshuffling (CoRe) technique is presented where measurement to disclose (MTD) is used to compare the security of the proposed on-chip CoRe regulator with the security of conventional on-chip voltage regulators. A DPA-resistant and lightweight advanced encryption standard (AES) engine implementation that leverages the CoRe technique is proposed. The impact of the centralized and distributed placement of the voltage regulators on the security of a pipelined AES engine is explored. The security implications of the relationship between the clock frequency of the device under attack and the switching frequency of the voltage regulator are investigated. As compared to an unprotected AES engine, the MTD value of the proposed improved pipelined AES engine with a centralized on-chip CoRe regulator is enhanced over 9100 times.

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