Abstract
Hardware and software solutions for a versatile pulse programmer have been presented. The core of the pulse programmer is an FPGA device that provides flexibility to the design and reduces the number of electronics elements needed. The event of the pulse programmer consists of 16 bits. The main feature of the proposed pulse programmer is that the 16 outputs can be independently delayed. This is important for correcting delays of the RF channels or the gradient channels due to various causes. The proposed pulse programmer is integrated into an MRI scanner, and the correction of the gradient system delay is taken as an example to experimentally demonstrate its performance.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
