Abstract
This paper presents a proposal on ESD (Electro Static Discharge) test method to understand an abnormal ESD failure caused by ESD current zapping sequence and to define an exact ESD threshold voltage. The abnormal ESD failure and threshold voltage level can not be detected by the prevailing used ESD test method which zapping ESD current stress to pins of DUT (Device Under Test) sequentially and automatically. Therefore this paper will show the abnormal ESD failure mechanismand also how to detect the actual ESD threshold voltage properly.
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