A Space Saving Digital VLSI Evolutionary Engine for CTRNN-EH Devices

Abstract

Continuous time recurrent neural network - evolvable hardware (CTRNN-EH) control devices are composed of an analog continuous time recurrent neural network (CTRNN) with an onboard evolutionary algorithm (EA) engine that evolves the parameters of the neural network. These control devices have been demonstrated to be useful in a variety of real time control applications and are amenable to mixed-signal VLSI implementation for the control applications under stringent size and power constraints. Unlike the CTRNNs, which are analog in nature, the EA engine has to be implemented using digital VLSI techniques. Because these techniques do not offer the advantages of small area and power directly, the task of adhering to size and power constraints is challenging and must be accomplished at the algorithmic level. In this paper, the authors discussed the aforementioned issues in detail and also propose a space-saving digital EA engine for the CTRNN-EH device. The EA engine has been modeled in Verilog HDL. The synthesis results are presented and the functionality of the EA is demonstrated on a small test problem.