Abstract
The fracture of silicon cells is a common reliability issue found in silicon‐based photovoltaic (PV) modules. Cracks initiate and propagate as a result of high residual stresses in silicon cells and cause power losses. In this study, the stresses in the longitudinal cross‐section of a PV laminate during the soldering and lamination processes are simulated and studied. A parametric study of the effect of interconnect thickness and yield strength is also performed and the results show that a peak maximum stress is reached at a certain interconnect to cell thickness ratio.
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