A Serial Processing FIR Inverse Filter Circuit

Abstract

SUMMARYInverse filters are used in many fields, including audio circuits, metal and optical telecom line equalization, and wireless equalization. The purpose of such filters is to compensate for distortion in the signal caused by the transmission medium. Design methods for an inverse filter using an IIR filter, FFT/IFFT, and an adaptive FIR filter are available. However, an IIR filter has some problems as regards stability. The FFT/IFFT method requires significant calculation and the adaptive FIR filter needs substantial time. This paper proposes a new method of generating the FIR inverse filter coefficients through serial calculations of the impulse response and its expected value. At first, all coefficients of the FIR filter except the first are set to zero. When an input of the impulse response data XN is applied to the filter, the temporal output of the FIR filter WN is compared to the expectation value EN, and the FIR inverse filter coefficients gN are calculated using step by step. This algorithm is simulated by calculations in Excel. The FPGA circuit is synthesized using VHDL and a behavior model is simulated using the ISE design tool. The coefficients of the filter are generated during the input period of the data XN. Therefore, real‐time inverse filter circuit generation is possible.