Abstract
The microcontroller chip for motor driver, industrial appliance, and automotive chips are required to provide methods for detecting unsafe conditions by software-driven or hardware support, such as IEC-60730 qualification requirements. Small, fast, safety-conscious operations are critical for designing safe microcontrollers, because additional hardware and software overhead is required to sense a malfunction. In this paper, especially for flash instruction memory, we propose silent execution hardware calculating the CRC of the ROM data during CPU idle time without any CPU wait cost. Parallel CRC hardware and the dedicated-FSM are executed faster at the clock level compared to software CRC calculation which requires an explicit CPU wait state. The 64kB ROM integrity verification in the experimental 8051 MCU requires about 24ms of execution time at an 8Mhz clock speed without any CPU wait state when running silently in background mode, and it requires an additional 1650 gates for the proposed hardware data path.
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