Abstract
A low noise frequency quadrupler for differential crystal oscillators (XOs) with an integerated jitter of 67 fsrms is proposed in this paper. A digitally duty cycle correction loop with fast convergence time is proposed to decrease the periodic deterministic jitter of the quadrupled reference clock. A ring-based injection-locked clock multiplier (ILCM) is implemented to show the effectiveness of the reference quadrupler. The output clock of ILCM achieves an integrated jitter of 387 fsrms at 2.8 GHz output frequency with a total multiplication factor of 56 and 6.2 mW consumed power from 1.2 V supply. The proposed design was implemented using 130-nm CMOS process.
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