A radiation detector design mitigating problems related to sawed edges

Abstract

In pixelated silicon radiation detectors that are utilized for the detection of UV, visible, and in particular Near Infra-Red (NIR) light it is desirable to utilize a relatively thick fully depleted Back-Side Illuminated (BSI) detector design providing 100% Fill Factor (FF), low Cross-Talk (CT), and high Quantum Efficiency (QE). The optimal thickness of such detectors is typically less than 300μm and above 40μm and thus it is more or less mandatory to thin the detector wafer from the backside after the front side of the detector has been processed and before a conductive layer is formed on the backside. A TAIKO thinning process is optimal for such a thickness range since neither a support substrate on the front side nor lithographic steps on the backside are required. The conductive backside layer should, however, be homogenous throughout the wafer and it should be biased from the front side of the detector.In order to provide good QE for blue and UV light the conductive backside layer should be of opposite doping type than the substrate. The problem with a homogeneous backside layer being of opposite doping type than the substrate is that a lot of leakage current is typically generated at the sawed chip edges, which may increase the dark noise and the power consumption. These problems are substantially mitigated with a proposed detector edge arrangement which 2D simulation results are presented in this paper.