Abstract
With rapid technological advancements and enhanced network growth, security contends to play a crucial role. A powerful network security tends to point out diverse mixture of threats and intimidations and blocks them from creeping and getting circulated into the network to preserve the reliability, confidentiality, integrity, and accessibility of computer networks by annihilating illegitimate admittance and corruption of critical information. Secure hash algorithms (SHA) are cryptographic hash functions used to produce a hash value of fixed output bit sizes. In this paper, an algorithm is proposed to strengthen the cryptographic systems by using reversible logic to generate higher and variable hash values, making it difficult to trace the keys. The proposed scheme is simulated and verified using FPGA Virtex ML505 board, the analysis of power and time of which is carried out using Genus tool, proving it to be efficient in terms of power, gate usage, garbage, and quantum cost.
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