Abstract
In this paper, we use our stencil code generation and auto-tuning framework Patus to optimize and parallelize the most compute intensive stencil calculations of an anelastic wave propagation code, which was used to conduct numerous significant simulations at the Southern California Earthquake Center. From a straight-forward specification of the stencil calculation, Patus automatically creates an implementation targeted at the chosen hardware platform and applies hardware-specific optimizations including cache blocking, loop unrolling, and explicit vectorization. We show that, using this approach, we are able to speed up individual compute kernels by a factor of 2.4× on average, and reduce the time required to compute one time step of the entire simulation by 47% in a weak and up to 129% in a strong thread scaling setting.
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