Abstract
Through-silicon-via (TSV) interposer has been proved to be a good solution for three-dimensional integration to achieve high density and improved performance. In this paper, a novel double-sides silicon interposer structure with deep trenches was proposed to achieve high density 3-D hetero-integration. The TSVs in the interposer were fabricated by wet etching method on both sides, which has low cost, good reliability and suitable for batch production. In order to minimize the TSV size and provide a higher interconnect density as well as retain the mechanical reliabilities of the interposer, deep trenches were wet-etched before TSV fabrication, which were also used for chip embedding. To further increase the integration density, multiple interconnects were attempted to be deposited in a single TSV and their electrical properties were systematically characterized.
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