Abstract

The paper reports a novel design of low noise amplifier (LNA) by cascading common gate, common source and common drain stage technique. The cascaded architecture achieves 5–10 dB of noise figure and 8.7 dB of gain in the required frequency band. The common gate stage provides input match while output match is fetched using common drain stage. The input/output match of below −20 dB/-10 dB is attained here. The reverse isolation is below −90dB. The 1-dB compression point and third intercept point (IIP3) is reported to be −27 dBm and 4.3 dBm at 7.7 GHz. The design is tested with the supplied voltage of 1 V. The proposed design is implemented using Cadence virtuoso analog and digital design environment in 90 nm CMOS technology.

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