A New TCAM Architecture for IP Routing With Update Complexity Equal to O(1)

Abstract

Ternary content addressable memories (TCAMs) have a lookup complexity of O(1). They require just one memory access to find an entry. For this reason, they are widely used in core routers of the Internet to achieve high packet forwarding capacities in terms of several 100 Gb/s. However, in a TCAM, the routing table needs to be stored in a sorted order according to the prefix length of the entries. Therefore, if a new entry needs to be added or an old one needs to be deleted, some other entries should be moved around to open a place for the new entry or fill the place of the old one. Practical methods to update a routing table require locking the TCAM during the update process. Therefore, this will cause a large number of packets to be dropped. This is because in the core routers of the Internet, the packets arrive at very high rates, and the routing table updates are very frequent. In this paper, we introduce a new, yet simple TCAM architecture in which entries do not need to be sorted. This means that updating the routing table will be done with a complexity of O(1), and therefore, no packets will be dropped.