A new approach to extracting the RF parameters of asymmetric DG MOSFETs with the NQS effect

Abstract

In analog circuit design an important parameter, from the perspective of superior device performance, is linearity. The DG MOSFET in asymmetric mode operation has been found to present a better linearity. In addition to that it provides, at the discretion of analog circuit designer, an additional degree of freedom, by providing independent bias control for the front and the back gates. Here a non-quasi-static (NQS) small signal model for DGMOSFET with asymmetric gate bias is proposed for extracting the parameters of the device using TCAD simulations. The parameters extracted here for analysis are the intrinsic front and back gate to drain capacitance, Cgd1 and Cgd2, the intrinsic front and back distributed channel resistance, Rgd1 and Rgd2 respectively, the transport delay, τm, and the inductance, Lsd. The parameter extraction model for an asymmetric DG MOSFET is validated with pre-established extracted parameter data, for symmetric DG MOSFET devices, from the available literature. The device simulation is performed with respect to frequency up to 100 GHz.