Abstract
This paper presents a new algorithm for fast hardware division, where two or three dividend bits are retired per iteration. The advantage that this algorithm has over radix-4 SRT is that it is much simpler requiring no lookup table and requiring the comparison of only one two-bit operand pair per iteration. Due to its simplicity, the new algorithm is much easier to implement and verify than radix-4 SRT and is quite likely to be faster as well.
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