A multichannel front-end readout ASIC for picosecond time resolution systems based on thin UFSD

Abstract

This work presents FAST, a multichannel readout ASIC designed to measure the time of arrival of MIP particles in Ultra-Fast Silicon Detectors (UFSD) with a time resolution of about 30 ps. The FAST ASIC is oriented to future High Energy Physics experiments, where high time resolution is exploited to mitigate pile-up effects, and more generally, to those applications that require accurate Time-of-Flight Silicon systems with low power consumption. The prototype has been designed in 110 nm CMOS technology, in three different flavors of front-end architecture. Each flavor is implemented in a different 20-channel ASIC. For all flavors, the power consumption of the front-end is 1.2 mW/channel. The three flavors of FAST are described in the paper, together with the simulation showing the timing performance of FAST coupled to different sensors geometries.