Abstract
A monolithic DFT processor has been designed using the chirp‐Z algorithm. The 512 point transform has potential application in a low cost homomorphic vocoder as well as instruments for the spectral or Doppler analysis of acoustical signals. Connected as a peripheral it could greatly increase the throughput of a minicomputer based signal processing system. The integrated circuit measures 240 × 215 mils and includes the required amplifiers, filters, and multipliers for the chirp‐Z algorithm. An external master clock and a read‐only‐memory are required to operate the chip. The design is easily modified to perform both a windowed or unwindowed, true or sliding DFT. The high functional density of this chip is achieved by the use of CCD transversal filters to perform the four required convolutions. A data recirculation feature allows the convolution required for either a true or sliding 512 point transform to be performed on a 512 stage filter. The pre and post multiplications are performed by four quadrant 10 bit multiplying digital‐to‐analog converters (MDAC's). The processor has been designed to operate at data rates of between 2 kHz and 2 MHz with 50 dB of dynamic range. [Work sponsored by U. S. Army Electronics Command.]
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
