Abstract
A new phenomenological model for the electrical conduction in polycrystalline silicon is developed. The combined mechanisms of dopant segregation, carrier trapping, and carrier reflection at grain boundaries are proposed to explain the electrical conduction in polycrystalline silicon. The grain boundaries are assumed to behave as an intrinsic wide-band-gap semiconductor forming a heterojunction with the grains. Thermionic emission over the potential barriers created within the grains due to carrier trapping at the grain boundaries and then tunneling through the grain boundaries is proposed as the carrier transport mechanism. A generalized current-voltage relationship is developed which shows that the electrical properties of polycrystalline silicon depend on the properties of the grain boundaries.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
