Abstract

A novel structure is presented to optimize the noise and linearity performance of a $${\text{g}}_{\text{m}}$$ -boosted common gate (CG) ultra-wide-band low noise amplifier (LNA) by exploiting noise and distortion canceling technique. The $${\text{g}}_{\text{m}}$$ -booster common source amplifier provides a degree of freedom to eliminate the limitation on the noise figure (NF) improvement, at a lower transconductance for the CG transistor. The applied noise and distortion canceling technique to the $${\text{g}}_{\text{m}}$$ -boosted topology is used to minimize the dominant noise contribution and the second and third order non-linearity coefficients of the first stage components. The proposed LNA is configured in a differential topology to compensate the $$IIP_{2}$$ of the structure. The Forward body bias technique is utilized for operating the LNA at a lower supply voltage and power consumption. The post-layout simulation results of the LNA, including bonding and electrostatic discharge circuits, with 90 nm TSMC RF CMOS technology show a power gain of 14.5 ± 05 dB, flat NF of 2.2 ± 0.1 dB, and $$S_{11}$$ less than − 9.5 dB for 3–5 GHz frequency at a power consumption of 13.8 mW from 0.7 V supply voltage. The $$IIP_{3}$$ and $$IIP_{2}$$ measures are obtained as + 5.2 dBm and 55 dBm, respectively.

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